disco Duro SSD Memory Systems: DRAM, DDR & Memory controller 

disco Duro SSD Memory Systems: DRAM, DDR & Memory controller 

disco Duro solid SSD This section of OEMdisco Duro SSD intends to review modern storage media and modern storage methods


DRAM is a very happy disco Duro SSD, and has been serving everyone for decades disco Duro SSD as if when it comes to memory, that is DRAM, DRAM has become synonymous with memory, Sometimes people even think that we have DRAM enough.


these are the ideas of ordinary consumers, and DRAM is not ideal for computer science researchers.

say that DRAM is volatile memory, which means that the content stored in it is lost after power loss. This is nothing, do not turn off the power can not be dropped? It may be too expensive for a desktop computer to keep the machine on, and then it is not a big deal for the server/mobile phone/tablet not to turn off the power.

but THERE is a bigger problem with DRAM, which is refreshing, refresh.

DRAM is not something that cannot be lost without powering it off. DRAM uses capacitors to store data, and capacitors have the problem of leakage. If you do nothing, even if you don’t turn off the power, the content stored in drAM will lose data little by little in tens of milliseconds to hundreds of milliseconds. In other words, without power off, the content in DRAM cannot be saved for more than one second.

the current solution to this problem is to refresh, in short, read out the data before it is lost, and then rewrite it. This process consumes power and DDR bus bandwidth. In the case that the memory capacity is not so large, that is, in the past few decades, this problem is not very big, so everyone does not have the motivation to spend a lot of time and experience on the new storage medium, of course, there is still research, but the investment is not high.

with the memory capacity getting larger and larger, now a memory stick has reached 32GB, followed by hundreds of T is not an unimaginable thing, the problem of refresh is getting bigger and bigger. The problem of DDR bus bandwidth can be solved by self-flushing, that is, a controller is integrated with the memory module to replace the DDR controller to send a refresh instruction. However, the power consumption problem caused by the refresh cannot be solved. For now, a storage device in a computer system already consumes a third of the electricity, and that percentage may increase.

For the server, electricity is money, who doesn’t want to save a third of the electricity bill?

For consumer electronics, electricity is the user experience, if you can reduce this third of the power consumption, your mobile phone can last for an extra day without charging.

for Storage, hard disks are increasingly abandoned by computers and will soon become floppy disks.

a hard drive is slow, but the capacity is now getting bigger and bigger, so it may end up being cold storage. For data centers, it is less and less present on compute nodes but is an important part of THE SAN.

for female consumers, many people may no longer have a hard disk. It may be a little more emotional to build a NAS at home and still use it. Come to think of it, the only reason to prevent it from being completely out of sight of consumption may be the love of “teachers” by the majority of men. However, with SSDs are getting cheaper, and it’s only a matter of time before hard drives disappear.

SSD The reason why it is not so cheap is that its capacity is not easy to do. First of all, the structure of Nand Flash is fixed, a memory unit occupies such a large place, you can’t try to optimize the structure to make it small. Improving the process is also a way, this method is not very easy to use, one to make the storage unit too small if it is easy to damage, the second is that the process is small and can not be used for the demand for capacity, the process is doubled at a time is also good.

so the current way to increase SSD capacity is mainly two, one is MLC and the other is stacking.

MLC is a storage unit to store multiple bits, that is, the potential stored in a unit was originally divided into two gears, which were considered to be 1 and 0, and now divided into 8 gears, which are considered to be 0 to 7.

stacked is equivalent to several chips stacked vertically, except that this is done inside the chip.


most of the modern storage media currently being studied are geared toward memory. Since most of them are non-volatile, the storage problem may be solved this way.

phase change memory is the most promising and commercially promising storage medium in the current research. That being said, when will it take to say that it can be commercialized? Maybe three years and five years, maybe five years and ten years, maybe thirty or fifty years…

was working on this thing when he first joined the company in 2012, when there were already samples available on the market, and even a Samsung mobile phone had used it as a storage device. So at that time, I felt that the time was very tight, and if I didn’t seize the time to study, the deployment of some patents might be a small change in the wave of computers. But in the blink of an eye 2018…


PCM is also called PCRAM, that is, Phase Change Memory or Phase Change RAM, Chinese called phase change memory. Its storage principle is:

transformed from: phase change memory (PCM) technology basics – communications/networks – and non-networks

that is, there is a material that can be reversibly converted back and forth between polycrystalline state and amorphous state, with low resistance in polycrystalline state and high resistance in form, which provides a possibility that can be used to store data. We apply a voltage to this material, if there is a large current, it means that it is polymorphic, if there is no large current, it is indicated that it is an indefinite form, and they can use this state to represent 0 and 1 respectively.

to some extent, NAND flash and nor flash also use similar principles to store data, but they have advantages over nand and nor flash.

relative to Nand flash, Nand flash needs to write data first and then write. PCMs can be written without direct access.

relative to Nor flash, Nor flash can be written directly, but its write speed is slow, and Nor flash’s storage density is not good, and can not do large capacity. PCM can be written directly, the write speed is also fast (and the DRAM write speed is expected to reach the same order of magnitude), and the storage density is still high.

relative to DRAM, DRAM to refresh, PCM is non-volatile, power failure does not lose data, and of course, there is no problem with the refresh. DRAM write is, in a way, a read-modify-write process that requires reading out a row of data, emptying the contents of a row of a cell, and then modifying the content in the row buffer before writing to the cell. The PCM can directly write 0 and 1 to a certain bit. Although the write speed is not as fast as DRAM now, it may exceed DRAM in the future.


until now, it seems that PCM is a super good thing, taking into account the advantages of DRAM and Flash, and can replace Memory and Storage uniformly. However, there are still some problems that make it not commercial:

so at present, although PCM is a good feature in all aspects, it is not an expert in all aspects, so it is crushed by the DRAM + Nand Flash combination.


now mention MRAM, basically talking about STT-MRAM, that is, Spin Torque Magnetic RAM. Chinese is called spin torque magnetoresistive RAM. Its principle is more complicated, I will not do not prepare a popular explanation, interested can look at Baidu Encyclopedia:  STT-MRAM_ Baidu Encyclopedia or Wikipedia. The following figure is taken from Baidu Encyclopedia:


If PCM wants to challenge the DRAM+Nand Flash combination with one force, STT-MRAM wants to challenge the SRAM+DRAM combination with one force.


has talked about the problem of DRAM, SRAM is also problematic, its biggest problem is that the capacity is too difficult to grow. Now more than half of the CPU area is used for SRAM. As I said before when talking about Cache, SRAM also has a problem that the larger its area is, the slower it is…

so now the level 1 cache has almost always been around 256KB, the level 2 cache is generally a few MB, and the level 3 cache is at most tens of MB. It is almost impossible to achieve a few gigabytes of SRAM.

if SRAM can do GB, or IF DRAM can do as fast as SRAM, we can squeeze the hierarchical structure of L3 cache + DRAM into one layer.

STT-MRAM seems to give hope, it has the following advantages:

just as PCM failed to kill the DRAM + Nand Flash combination, STT-MRAM did not kill the SRAM + DRAM combination for a reason:

The best result I know so far:

capacity: 1Gb of memory particles ever spin is working on. If you have 16 chips on one, it is 2GB.

writes: 10 to the 15th power (not remembered, data are welcome).

<p data-pid=”OTQaCsJh” > write speed: <20ns, but SRAM does L1 caching <ns.

From the current situation, if you have requirements for non-volatile memory but the capacity requirements are not very high, it will soon be available.

STT-MRAM reference:

 STT-MRAM_ Baidu Encyclopedia

 China Flash Forum Sense – The Way of Storage – 51CTO Blog

 DRAM Best Candidate: Spin-Injected MRAM Enters Practical Phase – Storage Technology – Electronic Engineering Worldnet

 Toshiba proposed a computing architecture that relies only on STT-MRAM for computing and storage


and there are some other storage media and methods that do not look so bright at present but may suddenly become beautiful in the future, such as ReRAM, FeRAM, etc. Here for some lazy reasons, I will not introduce it.

ReRAM suddenly catches fire, ready? __Electronic Miscellaneous_News_Zhongtu Electronic Network

FeRAM_ Baidu Encyclopedia

ReRAM_ Baidu Encyclopedia

 Intel wants to invest $3.5 billion in this flash memory in China, where is the 3DxPoint technology bull? | Lei Feng Network disco Duro solid SSD OEMdisco Duro SSD